Implantable stimulator for epileptic seizure suppression with loading impedance adaptability.

Chun-Yu Lin, Wei-Ling Chen, Ming-Dou Ker

Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, Hsinchu 300, Taiwan. cy.lin@ieee.org

IEEE transactions on biomedical circuits and systems 2013 Apr

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The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μA stimulus currents, as the loading impedance varied within 10 kΩ -300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35- μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.

Citation

Chun-Yu Lin, Wei-Ling Chen, Ming-Dou Ker. Implantable stimulator for epileptic seizure suppression with loading impedance adaptability. IEEE transactions on biomedical circuits and systems. 2013 Apr;7(2):196-203

PMID: 23853302

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